Intel 8253/54 Programmable Interval Timer

Necessity of Programmable Interval TimerThe 8253/54 solves one of most common problem in any microcomputer system, the generation of accurate time delays under software control. Instead of setting up timing loops in system software, the programmer configures the 8253/54 to match his requirements, initializes one of the counters of the 8253/54 with the desired quantity, … Continue reading Intel 8253/54 Programmable Interval Timer

8086 Interrupts

sources of Interrupt in 8086An interrupt in 8086 can be come in folowing ways: From an external signal applied to NMI or INTR input pin of the processor. The interrupts initiated by applying appropriate signals to these input pins are called hardware interrupt.The second source of interrupt is execution of the interrupt instruction "INT n", … Continue reading 8086 Interrupts

Frequency of Oscillation of RC Phase Shift Oscillator

https://cdnjs.cloudflare.com/ajax/libs/mathjax/2.7.2/MathJax.js?config=TeX-MML-AM_CHTML Derivation of Frequency of OscillationWe have to find out the transfer function of RC feedback network. Applying KVL to various loops on the figure, we get, $$I_1 \left(R+\frac{1}{j \omega C }\right) -I_2R=V_i \text{ ....(1)}$$ $$-I_1R+I_2\left (2R+\frac {1}{j\omega C}\right)-I_3R=0\text{ ... (2)}$$ $$0-I_2R+I_3\left(2R+ \frac{1}{j\omega C}\right)=0\text{ ...(3)}$$Replacing \(j\omega\) with \(s\) and writing equations in the matrix form, … Continue reading Frequency of Oscillation of RC Phase Shift Oscillator

VHDL Behavioral Description of all Logic Gates

AND Gatelibrary IEEE;use IEEE.STD_LOGIC_1164.ALL;entity and_gate isport(   a,b : in std_logic;   s : out std_logic);end and_gate;architecture Behavioral of and_gate isbegins<=a and b;end Behavioral;OR Gatelibrary IEEE;use IEEE.STD_LOGIC_1164.ALL;entity or_gate isport(   a,b : in std_logic;   s : out std_logic);end or_gate;architecture Behavioral of or_gate isbegins<=a or b;end Behavioral;NOT Gatelibrary IEEE;use IEEE.STD_LOGIC_1164.ALL;entity not_gate isport(   a : in … Continue reading VHDL Behavioral Description of all Logic Gates

Transistor Amplifier Design

RequirementsVoltage Gain: 50Required output voltage swing: 10VSelection of TransistorSelect transistor BC107 since minimum guaranteed \(h_{FE}\)(=100) is more than the required gain(=50) of the amplifier.Quick Reference Through BC107Type: NPN SiliconApplication: In audio frequencyMaximum Ratings:\(V_{CB}=50V, V_{CE}=45V,\\ V_{EB}=6V, I_C=100mA\)Nominal Ratings:\(V_{CE}=5V,  I_c=2mA, h_{FE}=100 \text{ to } 500\)CE amplifier circuit diagramDC Biasing Conditions\(V_{CC}\) is taken as \(20\%\) more than required output … Continue reading Transistor Amplifier Design

8086 Maximum Mode Signals and Maximum Mode Based System

span.putBar { border-top: 1px solid black; } .divScroll { white-space: nowrap; overflow-x:scroll; height:auto; width:auto; background-color:#bdbdbd; } Maximum mode signalsThe maximum mode signals of 8086 are listed in table below. The 8086 can made to work in maximum mode by grounding MN/MX. In maximum mode, the pin 24 to pin 31 are defined as follows. NameDescription/FunctionTypeRQ/GT1, … Continue reading 8086 Maximum Mode Signals and Maximum Mode Based System

8086 Minimum Mode Signals and Minimum Mode Based System

span.putBar { border-top: 1px solid black; } .divScroll { white-space: nowrap; overflow-x:scroll; height:auto; width:auto; background-color:#bdbdbd; } Minimum Mode SignalsThe minimum mode signals of an 8086 are listed in table below. For minimum mode of operation the MN/MX pin is tied to Vcc (logic high). In minimum mode, the 8086 itself generates all bus control signals. … Continue reading 8086 Minimum Mode Signals and Minimum Mode Based System